The present invention generally relates to an arrangement and method for transferring a pattern from a mask to a wafer, and more particularly to an arrangement and method for an alignment optimization in optical lithography.
The fabrication of microcircuit devices on a semiconductor wafer involves transferring patterns from (photo) lithographic masks to the semiconductor wafer. When transferring the pattern, it is important to have a proper alignment between the mask and the semiconductor wafer to properly match and override the device features of the semiconductor wafer at the different production steps. In particular, the alignment becomes more important as device and feature sizes decrease in the semiconductor industry. In general, alignment mark areas, which are distinct from product areas, are provided on the semiconductor wafer and mask. The alignment process is performed on the basis of the alignment marks positioned in the alignment mark areas.
Due to the effect of previous processing schemes, such as chemical-mechanical polishing (CMP) or etch processing on lithography alignment marks, the alignment accuracy can be degraded. Also film deposition processing may impact the alignment quality as an additional effect. If the alignment mark areas are located in the kerf (scribe grid) region, these marks also can be subject to undesirable etch loading effects (i.e. global and local density variations) from pattern density changes, i.e. there are pattern features that are etched more severely than others.
Thus, it is useful to employ various designs and/or sizes of alignment marks for different processes in order to minimize the degradation of the alignment accuracy. For newly introduced devices or changes in process technology, for example CMP, there is a need for optimizing new alignment marks or to study the effects of process changes on the alignment marks.
It has already been suggested that specific test masks or test reticles are used. U.S. Pat. No. 5,910,847 describes a test mask with a pattern to measure the uniformity of radiation in two direction. U.S. Pat. No. 5,627,624 teaches a test reticle with a number of orthogonal arranged alignment marks and an alignment mark size optimization method. U.S. Pat. No. 6,279,147 discloses a test mask having a test pattern portion within an existing product mask pattern.
However, these test reticles produced false results, mainly due to the absence of product features. Further, the integration, i.e. the combination of multiple processes within a series of different processes, such as etch, CMP or film deposition has a large influence on the alignment mark effectiveness, accuracy and repeatability of aligning. Such influence cannot be simulated by the above mentioned specific test reticles.
In other cases, test features are added to the kerf region in order to test, for example, electrical features or critical dimension features, like thickness or line width. These additional targets lead to problems due to an increasingly limited kerf area region.
Another way to test different types of alignment marks is the production of multiple masks and to determine which mask gives the best result. Such a production of multiple masks is, however, very expensive. The costs are particularly high when advanced masks (e.g. for masks using optical proximity correction or phase shifting) are used. Also, the increased application of reticles, which are particularly expensive, increases the costs when multiple masks are made.
The present invention seeks to solve the above-mentioned problems and to provide arrangements and methods that allow the optimization of alignment mark design without the need to produce multiple masks at high costs. A main object of the invention is an improvement in alignment accuracy.